IIT Gandhinagar Project Scientist Recruitment 2026 - Advt No. SPON/10455/Advt0302

Indian Institute of Technology (IIT) Gandhinagar, Research & Development Office invites online applications for a temporary position of Project Scientist under the project Silicon and Advanced Semiconductor Manufacturing Research and Training Hub (SAMARTH). Interested candidates who fulfil the required qualifications and experience may apply through the IIT Gandhinagar project staff recruitment portal by 18 September 2026.

Position Details

Application Link

Apply online at recruitment.iitgn.ac.in/projectstaff.

Required Qualification (as per Institute norms)

• Ph.D. or equivalent in Electrical/Electronics/Physics/Materials Science discipline with a very good academic record throughout. OR
• M.Tech./M.S. or equivalent qualification in Electrical/Electronics/Physics/Materials Science discipline with a minimum of 02 years of post-qualification experience in Teaching/Research/Industrial/Design in an organization/Industry of repute.
• The percentage/grade points with respect to the academic qualification will be a minimum 60% or equivalent grade from graduation onwards and 55% or equivalent grade in class 10th and 12th.

Key Responsibilities

• Build and calibrate physics-based TCAD models of diamond MOSFETs.
• Perform device and process simulations to optimise the gate stack, drift-region design, field plates and edge-termination schemes for high breakdown voltage and low specific on-resistance.
• Develop and execute cleanroom process flows for diamond devices, covering surface termination, photolithography, atomic layer deposition of high-k gate dielectrics, ICP-RIE dry etching and Ohmic and Schottky metallisation.
• Carry out material and structural characterisation using Raman spectroscopy, AFM, XPS, SEM/TEM and ellipsometry to qualify epitaxial layers, surface terminations and dielectric interfaces.
• Perform electrical characterisation of fabricated devices, including I-V, C-V, transfer and output characteristics, breakdown, Hall and TLM measurements, along with high-temperature and reliability testing.
• Correlate measured device data with simulation, extract model parameters, and feed the outcome back into the next design iteration and process split.
• Maintain process parameters, calibration records and design databases; prepare technical reports and manuscripts; track project milestones and guide junior project team members.

Essential Skills

• Strong fundamentals in semiconductor device physics, MOS electrostatics, carrier transport and power-device design, including breakdown, on-resistance and electric-field management.
• Hands-on experience with TCAD device and process simulation using Synopsys Sentaurus, Silvaco Atlas/Athena, COMSOL or an equivalent platform.
• Practical cleanroom experience in at least two of the following: photolithography, thin-film deposition (ALD, PECVD or sputtering), dry etching, metallisation and lift-off, or rapid thermal processing.
• Working knowledge of semiconductor electrical characterisation and the use of parameter analysers, probe stations, LCR meters and high-voltage measurement setups.
• Proficiency in Python or MATLAB for data analysis, measurement automation and post-processing of simulation results.
• Strong technical documentation, communication, problem-solving and project-ownership skills, together with the ability to work safely and methodically in a shared cleanroom environment.

Desirable Skills

• Prior experience with wide- or ultra-wide-bandgap semiconductors such as diamond, Ga2O3, GaN, SiC or AlN, in either simulation or fabrication.
• Familiarity with diamond-specific processes, including MPCVD homoepitaxial growth, hydrogen and oxygen surface termination, boron doping, and diamond ICP-RIE etch chemistries.
• Experience with high-voltage and high-temperature device measurement, edge terminations and field plates, and reliability or stress testing.
• Exposure to compact or SPICE model extraction, or to mixed-mode TCAD-circuit simulation of power converters.
• Familiarity with mask layout tools such as Cadence Virtuoso, KLayout or L-Edit, and with design-of-experiments methods for process optimisation.
• A record of peer-reviewed publications, conference presentations or patents, or independent execution of a device fabrication or simulation project.

Documents to Submit

Applicants must submit the following documents as part of their application:

1. Curriculum Vitae (CV) - covering educational qualifications, relevant projects, technical expertise and tool experience, professional experience, publications/patents, and awards/scholarships.
2. Statement of Purpose (SOP) (1-2 pages) - addressing motivation for applying, prior experience and expertise, how technical skills and research experience align with the job description, and long-term career goals.

Contact

Prof. Nihar Ranjan Mohapatra, Professor, EE, IIT Gandhinagar - Email: nihar@iitgn.ac.in

Merely fulfilling minimum eligibility criteria does not entail a call for written test/interview. Only candidates shortlisted based on better qualification and quality of relevant experience shall be called for written test/skill test/interview. The authorities reserve all rights, not to call an applicant for selection test or not to fill up a position without assigning any reason.

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